AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 250

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

CSR86
CSR88
CSR89
CSR92
CSR100
CSR112
CSR114
CSR116
CSR122
CSR124
CSR125
Cycle Frame 21
D
Data Receive Timing 78
Data Symbol RLL25 Encoding 79
Data Symbols 78
Data Transmit Timing 78
DC Characteristics Over Commercial Operating
Description of the Methodology 80
Descriptor DMA Transfers 51
Descriptor Ring Read In Burst Mode 52
Descriptor Ring Read In Non-Burst Mode 52
Descriptor Ring Write In Burst Mode 53
Descriptor Ring Write In Non-Burst Mode 53
Descriptor Rings 57
Destination Address Handling 63
Detailed Functions 74
Device ID Register 90
Device Select 21
DEVSEL 21
Digital Ground (8 Pins) 27
Digital I/O (Non-PCI Pins) 217
Digital Power (6 Pins) 27
Direct Access to the Interface 83
Direct Memory Access (DMA) 2
Direct SRAM Access 81
Disconnect Of Burst Transfer 36
Disconnect Of Slave Burst Transfer - Host Inserts Wait
Disconnect Of Slave Burst Transfer - No Host Wait
Disconnect Of Slave Cycle When Busy 37
Disconnect When Busy 36
Disconnect With Data Transfer 42, 44
Disconnect Without Data Transfer 44, 45
Index-4
Buffer Byte Counter 138
Chip ID Register Lower 138
Chip ID Register Upper 138
Ring Length Conversion 139
Bus Timeout 139
Missed Frame Count 139
Receive Collision Count 139
OnNow Power Mode Register 139, 140
Advanced Feature Control 141
Test Register 1 141
MAC Enhanced Configuration Control 141
Ranges 217
States 37
States 37
Am79C978A
DISTINCTIVE CHARACTERISTICS 1
Double Word I/O Mode 96
DVDDA 28
DVDDA_HR 28
DVDDD 28
DVDDRX, DVDDTX 28
DVSSD 28
DVSSX 28
E
EBCS Values 164
EECS 24
EEDET Setting 159
EEDI 25
EEDO 25
EEPROM 85
EEPROM Auto-Detection 83
EEPROM Chip Select 24
EEPROM Data In 25
EEPROM Data Out 25
EEPROM Interface 24, 82, 83
EEPROM MAP 84
EEPROM Map 85
EEPROM Read Functional Timing 227
EEPROM Serial clock 25
EEPROM Timing 220
EEPROM-Programmable Registers 83
EESK 25
Error Detection 63
Ethernet controllers in the PCnet Family 2
Ethernet Network Interfaces 26
Expansion ROM Read 36
Expansion ROM Transfers 35
External Clock 222
External Clock/Crystal Select 27
F
FIFO Burst Write At End Of Unaligned Buffer 55
FIFO Burst Write At Start Of Unaligned Buffer 55
FIFO DMA Transfers 54
Flow, LAPP B-2
FMDC Values 168
FRAME 21
Frame Format at the MII Interface Connection 31
Framing 62, 74
Full-Duplex Link Status LED Support 71
Full-Duplex Operation 71
G
GENERAL DESCRIPTION 2
GNT 21
H
H_RESET 93
Header AID Remote Control Word Commands 80
Home Networking Controller 1
Home Phoneline Networking Alliance (HomePNA) 1