AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 58
![no-image](/images/no-image-200.jpg)
AM79C978A
Manufacturer Part Number
AM79C978A
Description
Single-Chip 1/10 Mbps PCI Home Networking Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C978A.pdf
(256 pages)
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and receive descriptor rings into CSRs for use by the
Am79C978A controller during subsequent operations.
Figure 33 illustrates the relationship between the initial-
ization base address, the initialization block, the re-
ceive and transmit descriptor ring base addresses, the
receive and transmit descriptors, and the receive and
transmit data buffers, when SSIZE32 is cleared to 0.
58
TLE
RLE
IADR[31:16]
CSR2
Initialization
LADRF[47:32]
LADRF[63:48]
LADRF[31:16]
RES
RES
LADRF[15:0]
PADR[31:16]
PADR[47:32]
RDRA[15:0]
PADR[15:0]
TDRA[15:0]
Block
MOD
TDRA[23:16]
RDRA[23:16]
IADR[15:0]
CSR1
Figure 33. 16-Bit Software Model
Buffers
Buffers
Am79C978A
Rcv
Xmt
1st desc.
start
1st desc.
start
RMD
Note that the value of CSR2, bits 15-8, is used as the
upper 8-bits for all memory addresses during bus
master transfers.
Figure 34 illustrates when SSIZE32 is set to 1, the re-
lationship between the initialization base address, the
initialization block, the receive and transmit descriptor
ring base addresses, the receive and transmit de-
scriptors, and the receive and transmit data buffers.
TMD
Buffer
Buffer
Data
Data
1
1
RMD
Rcv Descriptor
N
TMD
M
Xmt Descriptor
Ring
RMD
Buffer
Buffer
N
TMD
Data
Data
Ring
2
2
M
RMD
N
TMD
M
2nd
desc.
2nd
desc.
RMD0
N
TMD
M
•
Buffer
Buffer
Data
Data
•
•
M
N
•
•
•
22399A-36
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