isp1583 NXP Semiconductors, isp1583 Datasheet - Page 99

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isp1583

Manufacturer Part Number
isp1583
Description
Hi-speed Universal Serial Bus Peripheral Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
24. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
7.6.1
7.6.2
7.6.3
7.6.4
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.14.1
7.14.2
7.15
7.16
7.17
7.17.1
7.17.2
7.17.3
8
8.1
8.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.4.1
8.2.5
ISP1583_6
Product data sheet
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . 13
Register description . . . . . . . . . . . . . . . . . . . . 30
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
DMA interface, DMA handler and DMA
registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Hi-Speed USB transceiver . . . . . . . . . . . . . . . 14
MMU and integrated RAM . . . . . . . . . . . . . . . 14
Microcontroller interface and microcontroller
handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OTG SRP module . . . . . . . . . . . . . . . . . . . . . . 15
NXP high-speed transceiver . . . . . . . . . . . . . . 15
NXP Parallel Interface Engine (PIE) . . . . . . . . 15
Peripheral circuit . . . . . . . . . . . . . . . . . . . . . . . 15
HS detection . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
NXP Serial Interface Engine (SIE) . . . . . . . . . 16
SoftConnect . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clear buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reconfiguring endpoints . . . . . . . . . . . . . . . . . 17
System controller . . . . . . . . . . . . . . . . . . . . . . 17
Modes of operation . . . . . . . . . . . . . . . . . . . . . 17
Pins status . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Interrupt output pin . . . . . . . . . . . . . . . . . . . . . 18
Interrupt control . . . . . . . . . . . . . . . . . . . . . . . 21
V
Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 23
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power-sharing mode. . . . . . . . . . . . . . . . . . . . 25
Self-powered mode. . . . . . . . . . . . . . . . . . . . . 27
Bus-powered mode. . . . . . . . . . . . . . . . . . . . . 28
Register access . . . . . . . . . . . . . . . . . . . . . . . 31
Initialization registers . . . . . . . . . . . . . . . . . . . 32
Address register (address: 00h) . . . . . . . . . . . 32
Mode register (address: 0Ch) . . . . . . . . . . . . . 32
Interrupt Configuration register (address: 10h) 34
OTG register (address: 12h) . . . . . . . . . . . . . . 35
Session Request Protocol (SRP) . . . . . . . . . . 37
Interrupt Enable register (address: 14h) . . . . . 37
BUS
sensing . . . . . . . . . . . . . . . . . . . . . . . . . 21
Rev. 06 — 20 August 2007
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
8.3.7
8.4
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.4.8
8.4.9
8.4.10
8.5
8.5.1
8.5.2
8.5.3
8.5.4
8.5.5
8.5.6
9
10
11
12
12.1
12.1.1
12.1.1.1
12.1.1.2
12.1.2
12.1.2.1
12.1.2.2
12.2
12.2.1
12.2.2
12.2.3
13
14
15
16
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 66
Recommended operating conditions . . . . . . 66
Static characteristics . . . . . . . . . . . . . . . . . . . 66
Dynamic characteristics . . . . . . . . . . . . . . . . . 68
Application information . . . . . . . . . . . . . . . . . 85
Test information. . . . . . . . . . . . . . . . . . . . . . . . 85
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 87
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Data flow registers . . . . . . . . . . . . . . . . . . . . . 39
Endpoint Index register (address: 2Ch) . . . . . 39
Control Function register (address: 28h) . . . . 40
Data Port register (address: 20h) . . . . . . . . . . 41
Buffer Length register (address: 1Ch) . . . . . . 42
Buffer Status register (address: 1Eh) . . . . . . . 43
Endpoint MaxPacketSize register
(address: 04h) . . . . . . . . . . . . . . . . . . . . . . . . 44
Endpoint Type register (address: 08h) . . . . . . 45
DMA registers . . . . . . . . . . . . . . . . . . . . . . . . 46
DMA Command register (address: 30h) . . . . 48
DMA Transfer Counter register (address: 34h) 50
DMA Configuration register (address: 38h) . . 51
DMA Hardware register (address: 3Ch) . . . . . 52
Task File registers (addresses: 40h to 4Fh) . . 54
DMA Interrupt Reason register (address: 50h) 56
DMA Interrupt Enable register (address: 54h) 58
DMA Endpoint register (address: 58h). . . . . . 58
DMA Strobe Timing register (address: 60h). . 59
DMA Burst Counter register (address: 64h). . 59
General registers . . . . . . . . . . . . . . . . . . . . . . 60
Interrupt register (address: 18h). . . . . . . . . . . 60
Chip ID register (address: 70h) . . . . . . . . . . . 62
Frame Number register (address: 74h) . . . . . 62
Scratch register (address: 78h) . . . . . . . . . . . 63
Unlock Device register (address: 7Ch). . . . . . 64
Test Mode register (address: 84h) . . . . . . . . . 64
Register access timing . . . . . . . . . . . . . . . . . . 70
Generic processor mode . . . . . . . . . . . . . . . . 70
8051 mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Freescale mode . . . . . . . . . . . . . . . . . . . . . . . 72
Split bus mode . . . . . . . . . . . . . . . . . . . . . . . . 74
ALE function. . . . . . . . . . . . . . . . . . . . . . . . . . 74
A0 function . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
DMA timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 80
PIO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
GDMA slave mode . . . . . . . . . . . . . . . . . . . . . 82
MDMA mode . . . . . . . . . . . . . . . . . . . . . . . . . 84
Hi-Speed USB Peripheral Controller
© NXP B.V. 2007. All rights reserved.
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