isp1583 NXP Semiconductors, isp1583 Datasheet - Page 70

• Manufacturer Part Number: isp1583
• Description: Hi-speed Universal Serial Bus Peripheral Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 100. ISP1583 register access timing parameters: separate address and data buses
V
ISP1583_6
Product data sheet
Symbol
Reading
t
t
t
t
t
t
RLRH
AVRL
RHAX
RLDV
RHDZ
RHSH
Fig 19. Receiver differential data jitter
CC(I/O)
= 1.65 V to 3.6 V; V
differential
data lines
T
PERIOD
3.3 V
Parameter
RW_N/RD_N LOW pulse width
address set-up time before RW_N/RD_N LOW
address hold time after RW_N/RD_N HIGH
RW_N/RD_N LOW to data valid delay
RW_N/RD_N HIGH to data outputs 3-state delay
RW_N/RD_N HIGH to CS_N HIGH delay
0 V
12.1.1.1 8051 mode
12.1.1 Generic processor mode
12.1 Register access timing
is the bit duration corresponding to the USB data rate.
T
PERIOD
Remark: In the following subsections, RW_N/RD_N, DS_N/WR_N, READY/IORDY and
ALE/A0 refer to the ISP1583 pin.
BUS_CONF/DA0 = HIGH: generic processor mode:
MODE0/DA1 = HIGH: 8051 mode; see
Fig 20. Receiver SE0 width tolerance
CC(3V3)
= 3.3 V; V
t
JR
N
consecutive
T
transitions
PERIOD
GND
= 0 V; T
Rev. 06 — 20 August 2007
t
JR1
differential
data lines
N
3.3 V
T
amb
transitions
0 V
PERIOD
paired
= 40 C to +85 C.
Conditions
t
JR2
Table 2
t
JR1
Hi-Speed USB Peripheral Controller
Min
> t
0
0
-
0
0
t
FST
RLDV
V
IH(min)
mgr872
Typ
-
-
-
-
-
-
t
JR2
© NXP B.V. 2007. All rights reserved.
ISP1583
Max
-
-
-
26
15
-
mgr871
70 of 100
Unit
ns
ns
ns
ns
ns
ns