isp1583 NXP Semiconductors, isp1583 Datasheet - Page 82
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isp1583
Manufacturer Part Number
isp1583
Description
Hi-speed Universal Serial Bus Peripheral Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1583.pdf
(100 pages)
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NXP Semiconductors
Table 107. GDMA slave mode timing parameters
V
ISP1583_6
Product data sheet
Symbol Parameter
T
t
t
t
t
t
t
t
t
t
t
t
su1
d1
h1
w1
w2
d2
h2
h3
su2
su3
a1
CC(I/O)
Fig 32. GDMA slave mode timing: DIOR (master) and DIOW (slave)
cy1
(1) Programmable polarity: shown as active LOW.
(2) Programmable polarity: shown as active HIGH.
(write) DATA [ 15:0 ]
(read) DATA [ 15:0 ]
DIOR or DIOW
= 1.65 V to 3.6 V; V
DREQ is continuously asserted, until the last transfer is done or the FIFO is full.
Data strobes: DIOR (read), DIOW (write).
read or write cycle time
DREQ set-up time before first DACK on
DREQ on delay after last strobe off
DREQ hold time after last strobe on
DIOR or DIOW pulse width
DIOR or DIOW recovery time
read data valid delay after strobe on
read data hold time after strobe off
write data hold time after strobe off
write data set-up time before strobe off
DACK set-up time before DIOR or DIOW assertion
DACK de-assertion after DIOR or DIOW de-assertion
DREQ
DACK
12.2.2 GDMA slave mode
(2)
(1)
(1)
•
•
•
CC(3V3)
Bits MODE[1:0] = 00: data strobes DIOR (read) and DIOW (write); see
Bits MODE[1:0] = 01: data strobes DIOR (read) and DACK (write); see
Bits MODE[1:0] = 10: data strobes DACK (read and write); see
t
su1
t
= 3.3 V; V
su3
t
d2
t
w1
t
su2
GND
= 0 V; T
Rev. 06 — 20 August 2007
t
h2
t
w2
t
h3
amb
T
cy1
= 40 C to +85 C.
Conditions
Hi-Speed USB Peripheral Controller
Min
75
10
33.33
0
39
36
-
-
1
10
0
0
t
h1
t
a1
Typ
-
-
-
-
-
-
-
-
-
-
-
-
Figure 34
© NXP B.V. 2007. All rights reserved.
t
d1
ISP1583
Max
-
-
-
53
600
-
20
5
-
-
-
30
mgt500
Figure 32
Figure 33
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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