isp1583 NXP Semiconductors, isp1583 Datasheet - Page 13

• Manufacturer Part Number: isp1583
• Description: Hi-speed Universal Serial Bus Peripheral Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
7. Functional description
ISP1583_6
Product data sheet
The ISP1583 is a high-speed USB Peripheral Controller. It implements the Hi-Speed USB
or the Original USB physical layer, and the packet protocol layer. It concurrently maintains
up to 16 USB endpoints (control IN, control OUT, and seven IN and seven OUT
configurable) along with endpoint EP0 set up, which accesses the set-up buffer. The
1 “Universal Serial Bus Specification Rev.
using the external firmware.
The ISP1583 has a fast general-purpose interface to communicate with most types of
microcontrollers and microprocessors. This microcontroller interface is configured using
pins BUS_CONF/DA0, MODE1 and MODE0/DA1 to accommodate most interface types.
Two bus configurations are available, selected using input BUS_CONF/DA0 during
power-up:
For high-bandwidth data transfer, the integrated DMA handler can be invoked to transfer
data to or from external memory or devices. The DMA interface can be configured by
writing to proper DMA registers (see
The ISP1583 supports Hi-Speed USB and Original USB signaling. The USB signaling
speed is automatically detected.
The ISP1583 has 8 kB of internal FIFO memory, which is shared among enabled USB
endpoints, including control IN and control OUT endpoints, and set-up token buffer.
There are seven IN and seven OUT configurable endpoints, and two fixed control
endpoints that are 64 bytes long. Any of the seven IN and seven OUT endpoints can be
separately enabled or disabled. The endpoint type (interrupt, isochronous or bulk) and
packet size of these endpoints can be individually configured, depending on the
requirements of the application. Optional double buffering increases the data throughput
of these data endpoints.
The ISP1583 requires 3.3 V power supply. It has 5 V tolerant I/O pads and an internal
1.8 V regulator to power the digital logic. The I/O voltage can range from 1.65 V to 3.6 V.
•
•
Generic processor mode (pin BUS_CONF/DA0 = HIGH):
– AD[7:0]: 8-bit address bus (selects target register)
– DATA[15:0]: 16-bit data bus (shared by processor and DMA)
– Control signals: RW_N and DS_N or RD_N and WR_N (selected using pin
– DMA interface (generic slave mode only): Uses lines DATA[15:0] as data bus,
Split bus mode (pin BUS_CONF/DA0 = LOW):
– AD[7:0]: 8-bit local microprocessor bus (multiplexed address and data)
– DATA[15:0]: 16-bit DMA data bus
– Control signals: CS_N, ALE or A0 (selected using pin MODE1), RW_N and DS_N
– DMA interface (master or slave mode): Uses DIOR and DIOW as dedicated read
MODE0/DA1), CS_N
DIOR and DIOW as dedicated read and write strobes
or RD_N and WR_N (selected using pin MODE0/DA1)
and write strobes
Rev. 06 — 20 August 2007
Section
2.0”, Chapter 9 protocol handling is executed
8.4).
Hi-Speed USB Peripheral Controller
© NXP B.V. 2007. All rights reserved.
ISP1583
13 of 100
Ref.