isp1583 NXP Semiconductors, isp1583 Datasheet - Page 19

• Manufacturer Part Number: isp1583
• Description: Hi-speed Universal Serial Bus Peripheral Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1583_6
Product data sheet
Each of the indicated USB and DMA events is logged in a status bit of the Interrupt
register and the DMA Interrupt Reason register, respectively. Corresponding bits in the
Interrupt Enable register and the DMA Interrupt Enable register determine whether an
event will generate an interrupt.
Interrupts can be masked globally by means of bit GLINTENA of the Mode register.
Field CDBGMOD[1:0] of the Interrupt Configuration register controls the generation of INT
signals for the control pipe. Field DDBGMODIN[1:0] of the Interrupt Configuration register
controls the generation of INT signals for the IN pipe. Field DDBGMODOUT[1:0] of the
Interrupt Configuration register controls the generation of INT signals for the OUT pipe;
see
Table
27.
Rev. 06 — 20 August 2007
Hi-Speed USB Peripheral Controller
© NXP B.V. 2007. All rights reserved.
ISP1583
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