isp1583 NXP Semiconductors, isp1583 Datasheet - Page 12

• Manufacturer Part Number: isp1583
• Description: Hi-speed Universal Serial Bus Peripheral Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 2.
[1]
[2]
[3]
[4]
[5]
ISP1583_6
Product data sheet
Symbol
BUS_CONF/
DA0
WAKEUP
SUSPEND
DGND
DGND
Symbol names ending with underscore N, for example, NAME_N, represent active LOW signals.
All outputs and I/O pins can source 4 mA, unless otherwise specified.
Control signals are not 3-stated.
Add a decoupling capacitor (0.1 F) to all the supply pins. For better EMI results, add a 0.01 F capacitor in parallel to 0.1 F.
The DMA bus is in 3-state until a DMA command (see
[3]
[1]
Pin description
Pin
62
63
64
-
exposed die
pad
ISP1583BS ISP1583ET ISP1583ET1
…continued
B2
A2
C2
B9
J9
A3
B2
A2
-
B8, G7
Rev. 06 — 20 August 2007
Section
8.4.1) is executed.
Type
I/O
I
O
-
-
[2]
Description
Bus configuration input — Selects bus mode during
power-up:
Address selection output — Selects the Task File
register of an ATA/ATAPI device at normal operation;
see
bidirectional pad; 10 ns slew-rate control; TTL; 5 V
tolerant
wake-up input; when this pin is at the HIGH level, the
chip is prevented from going into the suspend state
and wake-up the chip when already in suspend mode;
when not in use, connect this pin to ground through a
10 k resistor
When the RESET_N pin is LOW, ensure that the
WAKEUP pin does not go from LOW to HIGH;
otherwise the device will enter test mode.
input pad; TTL; 5 V tolerant
suspend state indicator output; used as a power
switch control output to power-off or power-on external
devices when going into suspend mode or recovering
from suspend mode
CMOS output; 8 mA drive
digital ground
ground supply; down bonded to the exposed die pad
(heat sink); to be connected to DGND during the PCB
layout
•
•
Table 59
LOW: split bus mode; multiplexed 8-bit address
and data bus on AD[7:0], separate DMA data bus
DATA[15:0]
HIGH (connect to V
mode; separate 8-bit address on AD[7:0], 16-bit
processor data bus on DATA[15:0]; DMA is
multiplexed on processor bus DATA[15:0]
Hi-Speed USB Peripheral Controller
[5]
CC(I/O)
): generic processor
© NXP B.V. 2007. All rights reserved.
ISP1583
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