isp1583 NXP Semiconductors, isp1583 Datasheet - Page 59

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isp1583

Manufacturer Part Number
isp1583
Description
Hi-speed Universal Serial Bus Peripheral Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 76.
ISP1583_6
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
DMA Strobe Timing register: bit allocation
8.4.10 DMA Burst Counter register (address: 64h)
8.4.9 DMA Strobe Timing register (address: 60h)
7
-
-
-
Table 75.
The DMA Endpoint register must not reference the endpoint that is indexed by the
Endpoint Index register (2Ch) at any time. Doing so will result in data corruption.
Therefore, if the DMA Endpoint register is unused, point it to an unused endpoint. If the
DMA Endpoint register, however, is pointed to an active endpoint, the firmware must not
reference the same endpoint on the Endpoint Index register.
This 1-byte register controls the strobe timing for MDMA mode, when bits
DMA_MODE[1:0] in the DMA Configuration register have been set to 03h.
The bit allocation is given in
Table 77.
[1]
Table 78
Bit
7 to 4
3 to 1
0
Bit
7 to 5
4 to 0
Fig 17. Programmable strobe timing
The cycle duration indicates the internal clock cycle (33.3 ns/cycle).
reserved
6
-
-
-
Symbol
-
DMA_STROBE_
CNT[4:0]
shows the bit allocation of the 2-byte register.
DMA Endpoint register: bit description
DMA Strobe Timing register: bit description
Symbol
-
EPIDX[2:0]
DMADIR
5
-
-
-
Rev. 06 — 20 August 2007
Description
reserved
DMA Strobe Count: These bits select the strobe duration for
DMA_MODE = 03h (see
cycles
Figure
Description
reserved
Endpoint Index: selects the indicated endpoint for DMA access
DMA Direction:
0 — Selects the RX/OUT FIFO for DMA read transfers
1 — Selects the TX/IN FIFO for DMA write transfers
Table
R/W
[1]
4
1
1
17).
, with N representing the value of DMA_STROBE_CNT (see
76.
x
(N + 1) cycles
R/W
x
3
1
1
DMA_STROBE_CNT[4:0]
Table
Hi-Speed USB Peripheral Controller
004aaa125
54). The strobe duration is (N + 1)
R/W
2
1
1
R/W
1
1
1
© NXP B.V. 2007. All rights reserved.
ISP1583
R/W
59 of 100
0
1
1

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