mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 78
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mc68hc912dg128
Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912DG128.pdf
(452 pages)
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Operating Modes
MODE — Mode Register
5.4 Background Debug Mode
Technical Data
78
RESET:
RESET:
RESET:
RESET:
RESET:
RESET:
RESET:
SMODN
Bit 7
0
0
0
0
1
1
1
MODB
6
0
0
1
1
0
0
1
Background debug mode (BDM) is an auxiliary operating mode that is
used for system development. BDM is implemented in on-chip hardware
and provides a full set of debug operations. Some BDM commands can
be executed while the CPU is operating normally. Other BDM
commands are firmware based, and require the BDM firmware to be
enabled and active for execution.
Freescale Semiconductor, Inc.
MODA
For More Information On This Product,
5
0
1
0
1
0
1
1
Special Expanded Narrow Mode — This mode can be used
for emulation of normal expanded narrow mode. Ports A and B
are used for the16-bit address bus. Port A is used as the data
bus, multiplexed with addresses. In this mode, 16-bit data is
presented one byte at a time, the high byte followed by the low
byte. The address is automatically incremented on the second
cycle.
Special Peripheral Mode — The CPU is not active in this
mode. An external master can control on-chip peripherals for
testing purposes. It is not possible to change to or from this
mode without going through reset. Background debugging
should not be used while the MCU is in special peripheral
mode as internal bus conflicts between BDM and the external
master can cause improper operation of both modes.
Go to: www.freescale.com
ESTR
4
1
1
1
1
1
1
1
Operating Modes
IVIS
3
1
1
1
1
0
0
0
EBSWAI
2
0
0
0
0
0
0
0
EMK
1
1
1
1
1
0
0
0
MC68HC912DG128 — Rev 3.0
EME
Bit 0
1
1
1
1
0
0
0
Special Single Chip
Normal Single Chip
Special Exp Wide
Normal Exp Wide
Special Exp Nar
Normal Exp Nar
Peripheral
MOTOROLA
$000B
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