mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 243

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

PBCTL — 16-Bit Pulse Accumulator B Control Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
BIT 7
0
0
PBEN
6
0
Read: any time
Write: any time
PBEN — Pulse Accumulator B System Enable
PBOVI — Pulse Accumulator B Overflow Interrupt enable
Freescale Semiconductor, Inc.
16-Bit Pulse Accumulator B (PACB) is formed by cascading the 8-bit
pulse accumulators PAC1 and PAC0.
When PBEN is set, the PACB is enabled. The PACB shares the input
pin with IC0.
PBEN is independent from TEN. With timer disabled, the pulse
accumulator can still function unless pulse accumulator is disabled.
For More Information On This Product,
0 = 16-bit Pulse Accumulator system disabled. 8-bit PAC1 and
1 = Pulse Accumulator B system enabled. The two 8-bit pulse
0 = interrupt inhibited
1 = interrupt requested if PBOVF is set
5
0
0
PAC0 can be enabled when their related enable bits in
ICPACR ($A8) are set.
accumulators PAC1 and PAC0 are cascaded to form the
PACB 16-bit pulse accumulator. When PACB in enabled, the
PACN1 and PACN0 registers contents are respectively the
high and low byte of the PACB.
PA1EN and PA0EN control bits in ICPACR ($A8) have no
effect.
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Enhanced Capture Timer
4
0
0
3
0
0
2
0
0
PBOVI
1
0
Enhanced Capture Timer
BIT 0
0
0
Timer Registers
Technical Data
$00B0
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