mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 289

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

DDRIB — Data Direction for Port IB Register
PORTIB — Port Data IB Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
RESET:
IIC
DDRIB7
PIB7
Bit 7
Bit 7
SCL
0
-
DDRIB6
Read and write anytime.
IIC functions SCL and SDA share port IB pins 7 and 6 and take
precedence over the general-purpose port when IIC is enabled. The
SCL and SDA output buffers behave as open-drain outputs.
When port is configured as input, a read will return the pin level. Port bits
3-0 have internal pull ups when configured as inputs so they will read ones.
When configured as output, a read will return the latched output data.
Port bits 5 through 0 will read the last value written. A write will drive
associated pins only if configured for output and IIC is not enabled.
Port bits 3-0 do not have available external pins.
Read and write anytime
DDRIB[7:4] — Port IB [7:4] Data direction
DDRIB[3:0] — These bits serve as memory locations since there are no
corresponding external port pins.
PIB6
SDA
6
0
6
-
Freescale Semiconductor, Inc.
Each bit determines the primary direction for each pin configured as
general-purpose I/O.
For More Information On This Product,
0 = Associated pin is a high-impedance input.
1 = Associated pin is an output.
DDRIB5
PIB5
5
0
5
-
-
Go to: www.freescale.com
DDRIB4
Inter-IC Bus
PIB4
4
4
0
-
-
DDRIB3
PIB3
3
3
0
-
-
DDRIB2
PIB2
2
2
0
-
-
DDRIB1
PIB1
1
-
-
1
0
IIC Register Descriptions
DDRIB0
PIB0
Bit 0
Bit 0
-
-
0
Technical Data
Inter-IC Bus
$00E7
$00E6
289