mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 288

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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IBPURD — Pull-Up and Reduced Drive for Port IB
IBDR — IIC Bus Data I/O Register
Inter-IC Bus
Technical Data
288
RESET:
RESET:
Bit 7
NOTE:
D7
0
Bit 7
0
0
D6
6
0
.
Read and write anytime
In master transmit mode, when data is written to the IBDR a data transfer
is initiated. The most significant bit is sent first. In master receive mode,
reading this register initiates next byte data receiving. In slave mode, the
same functions are available after an address match has occurred.
In master transmit mode, the first byte of data written to IBDR following
assertion of MS/SL is used for the address transfer and should comprise
of the calling address (in position D7-D1) concatenated with the required
R/W bit (in position D0).
Read and write anytime
RDPIB — Reduced Drive of Port IB
PUPIB — Pull-Up Port IB Enable
6
0
0
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = All port IB output pins have full drive enabled.
1 = All port IB output pins have reduced drive capability.
0 = Port IB pull-ups are disabled.
1 = Enable pull-up devices for port IB input pins [7:4]. Pull-ups for
D5
5
0
port IB input pins [3:0] are always enabled.
5
0
0
Go to: www.freescale.com
D4
4
0
RDPIB
Inter-IC Bus
4
0
D3
3
0
3
0
0
D2
2
0
2
0
0
MC68HC912DG128 — Rev 3.0
D1
1
0
1
0
0
Bit 0
D0
PUPIB
0
Bit 0
0
MOTOROLA
High
$00E4
$00E5

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