mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 352

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MSCAN Controller
Technical Data
352
CIDMR0
CIDMR1
CIDMR2
CIDMR3
CIDMR4
CIDMR5
CIDMR6
CIDMR7
$0114
$0115
$0116
$0117
$011C
$011D
$011E
$011F
RESET
RESET
W
W
W
W
R
R
R
R
W
W
W
W
R
R
R
R
NOTE:
Bit 7
AM7
AM7
AM7
AM7
AM7
AM7
AM7
AM7
Bit 7
-
-
Figure 17-17. Identifier Mask Registers (2nd bank)
Figure 17-16. Identifier Mask Registers (1st bank)
CIDMR5 to ‘don’t care. To receive standard identifiers in 16 bit filter
mode it is required to program the last three bits (AM2–AM0) in the mask
registers CIDMR1, CIDMR3, CIDMR5 and CIDMR7 to ‘don’t care
AM7 – AM0 — Acceptance Mask Bits
The CIDMR0–7 registers can only be written if the SFTRES bit in
CMCR0 is set.
AM6
AM6
AM6
AM6
AM6
AM6
AM6
AM6
Freescale Semiconductor, Inc.
If a particular bit in this register is cleared this indicates that the
corresponding bit in the identifier acceptance register must be the
same as its identifier bit, before a match is detected. The message is
accepted if all such bits match. If a bit is set, it indicates that the state
of the corresponding bit in the identifier acceptance register does not
affect whether or not the message is accepted.
6
-
6
-
For More Information On This Product,
0 = Match corresponding acceptance code register and identifier bits.
1 = Ignore corresponding acceptance code register bit.
Go to: www.freescale.com
AM5
AM5
AM5
AM5
AM5
AM5
AM5
AM5
5
5
-
-
MSCAN Controller
AM4
AM4
AM4
AM4
AM4
AM4
AM4
AM4
4
4
-
-
AM3
AM3
AM3
AM3
AM3
AM3
AM3
AM3
3
3
-
-
AM2
AM2
AM2
AM2
AM2
AM2
AM2
AM2
MC68HC912DG128 — Rev 3.0
2
2
-
-
AM1
AM1
AM1
AM1
AM1
AM1
AM1
AM1
1
1
-
-
MOTOROLA
Bit 0
AM0
AM0
AM0
AM0
AM0
AM0
AM0
AM0
Bit 0
-
-