mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 431

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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EEMCR — EEPROM Module Configuration
MC68HC912DG128 — Rev 3.0
MOTOROLA
1. Bits 4 and 5 have test functions and should not be programmed.
2. Loaded from SHADOW word.
RESET:
NOBDML
Bit 7
NOTE:
(2)
NOSHW
6
(2)
Bits[7:4] are loaded at reset from the EEPROM SHADOW word.
The bits 5 and 4 are reserved for test purposes. These locations in
SHADOW word should not be programmed otherwise some locations of
regular EEPROM array will not be more visible.
NOBDML — Background Debug Mode Lockout Disable
NOSHW — SHADOW Word Disable
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
When NOSHW cleared, the regular EEPROM array bytes at address
$0FC0 and $0FC1 are not visible. The SHADOW word is accessed
instead for both read and program/erase operations. Bits[7:4] from
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = The BDM lockout is enabled.
1 = The BDM lockout is disabled.
0 = The SHADOW word is enabled and accessible at address
1 = Regular EEPROM array at address $0FC0-$0FC1.
Appendix: MC68HC912DG128A EEPROM
Osc Freq.
500 Khz
250 Khz
RESERVED
16 Mhz
5
8 Mhz
4 Mhz
2 Mhz
1 Mhz
(2)
$0FC0-$0FC1.
Go to: www.freescale.com
(1)
4
(2)
Table 22-1. EEDIV Selection
Osc Period
62.5ns
125ns
250ns
500ns
1 s
2 s
4 s
3
1
1
EESWAI
Appendix: MC68HC912DG128A EEPROM
Divide Factor
2
1
560
280
140
70
35
18
9
PROTLCK
1
0
EEPROM Control Registers
DMY
Bit 0
EEDIV
$008C
$0230
$0118
$0046
$0023
$0012
$0009
0
Technical Data
$00F0
431

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