mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 130

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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EEPROM Memory
Technical Data
130
EETST — EEPROM Test
RESET:
EEODD
Bit 7
0
EEVEN
Read anytime. Write in special modes only (SMODN = 0). These bits are
used for test purposes only. In normal modes the bits are forced to zero.
EEODD — Odd Row Programming
EEVEN — Even Row Programming
MARG — Program and Erase Voltage Margin Test Enable
EECPD — Charge Pump Disable
EECPRD — Charge Pump Ramp Disable
EECPM — Charge Pump Monitor Enable
6
0
Freescale Semiconductor, Inc.
This bit is used to evaluate the program/erase voltage margin.
Known to enhance write/erase endurance of EEPROM cells.
For More Information On This Product,
0 = Odd row bulk programming/erasing is disabled.
1 = Bulk program/erase all odd rows.
0 = Even row bulk programming/erasing is disabled.
1 = Bulk program/erase all even rows.
0 = Normal operation.
1 = Program and Erase Margin test.
0 = Charge pump is turned on during program/erase.
1 = Disable charge pump.
0 = Charge pump is turned on progressively during program/erase.
1 = Disable charge pump controlled ramp up.
0 = Normal operation.
1 = Output the charge pump voltage on the IRQ/V
MARG
5
0
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EEPROM Memory
EECPD
4
0
EECPRD
3
0
2
0
0
EECPM
MC68HC912DG128 — Rev 3.0
1
0
Bit 0
0
0
PP
pin.
MOTOROLA
$00F2

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