mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 272

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Multiple Serial Interface
DDRS — Data Direction Register for Port S
Technical Data
272
RESET:
DDS7
Bit 7
NOTE:
0
DDS6
6
0
After reset all bits are configured as general-purpose inputs.
Port S shares function with the on-chip serial systems (SPI and SCI0/1).
Read or write anytime.
DDS2, DDS0 — Data Direction for Port S Bit 2 and Bit 0
DDS3, DDS1 — Data Direction for Port S Bit 3 and Bit 1
DDS[6:4] — Data Direction for Port S Bits 6 through 4
DDS7 — Data Direction for Port S Bit 7
If mode fault error occurs, bits 5, 6 and 7 are forced to zero. .
Freescale Semiconductor, Inc.
After reset, all general-purpose I/O are configured for input only.
If the SCI receiver is configured for two-wire SCI operation,
corresponding port S pins will be input regardless of the state of these
bits.
If the SCI transmitter is configured for two-wire SCI operation,
corresponding port S pins will be output regardless of the state of
these bits.
If the SPI is enabled and expects the corresponding port S pin to be
an input, it will be an input regardless of the state of the DDRS bit. If
the SPI is enabled and expects the bit to be an output, it will be an
output ONLY if the DDRS bit is set.
In SPI slave mode, DDRS7 has no meaning or effect; the PS7 pin is
dedicated as the SS input. In SPI master mode, DDRS7 determines
whether PS7 is an error detect input to the SPI or a general-purpose
or slave select output line.
For More Information On This Product,
0 = Configure the corresponding I/O pin for input only
1 = Configure the corresponding I/O pin for output
DDS5
5
0
Go to: www.freescale.com
Multiple Serial Interface
DDS4
4
0
DDS3
3
0
DDS2
2
0
MC68HC912DG128 — Rev 3.0
DDS1
1
0
DDS0
Bit 0
0
MOTOROLA
$00D7