mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 46

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Pinout and Signal Descriptions
3.4.5 Nonmaskable Interrupt (XIRQ)
3.4.6 Mode Select (SMODN, MODA, and MODB)
3.4.7 Single-Wire Background Mode Pin (BKGD)
Technical Data
46
The XIRQ input provides a means of requesting a nonmaskable interrupt
after reset initialization. During reset, the X bit in the condition code
register (CCR) is set and any interrupt is masked until MCU software
enables it. Because the XIRQ input is level sensitive, it can be connected
to a multiple-source wired-OR network. This pin is always an input and
can always be read. There is an active pull-up on this pin while in reset
and immediately out of reset. The pull-up can be turned off by clearing
PUPE in the PUCR register. XIRQ is often used as a power loss detect
interrupt.
Whenever XIRQ or IRQ are used with multiple interrupt sources (IRQ
must be configured for level-sensitive operation if there is more than one
source of IRQ interrupt), each source must drive the interrupt input with
an open-drain type of driver to avoid contention between outputs. There
must also be an interlock mechanism at each interrupt source so that the
source holds the interrupt line low until the MCU recognizes and
acknowledges the interrupt request. If the interrupt line is held low, the
MCU will recognize another interrupt as soon as the interrupt mask bit in
the MCU is cleared (normally upon return from an interrupt).
The state of these pins during reset determine the MCU operating mode.
After reset, MODA and MODB can be configured as instruction queue
tracking signals IPIPE0 and IPIPE1 in expanded modes. MODA and
MODB have active pull-downs during reset.
The SMODN pin has an active pull-up when configured as an input. This
pin can be used as BKGD or TAGHI after reset.
The BKGD pin receives and transmits serial background debugging
commands. A special self-timing protocol is used. The BKGD pin has an
active pull-up when configured as an input; BKGD has no pull-up control.
Refer to
Freescale Semiconductor, Inc.
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Pinout and Signal Descriptions
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MC68HC912DG128 — Rev 3.0
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