mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 113
mc68hc912dg128
Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912DG128.pdf
(452 pages)
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FEECTL — Flash EEPROM Control Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
Bit 7
NOTE:
0
0
6
0
0
FEESWAI — Flash EEPROM Stop in Wait Control
The FEESWAI bit cannot be asserted if the interrupt vector resides in the
Flash EEPROM array.
SVFP — Status V
ERAS — Erase Control
LAT — Latch Control
Freescale Semiconductor, Inc.
This register controls the programming and erasure of the Flash
EEPROM.
SVFP is a read only bit.
This bit can be read anytime or written when ENPE = 0. When set, all
locations in the array will be erased at the same time. The boot block
will be erased only if BOOTP = 0. This bit also affects the result of
attempted array reads. See
ERAS cannot change if ENPE is set.
This bit can be read anytime or written when ENPE = 0. When set, the
Flash EEPROM is configured for programming or erasure and, upon
the next valid write to the array, the address and data will be latched
for the programming sequence. See
on array reads. A high voltage detect circuit on the V
assertion of the LAT bit when the programming voltage is at normal
levels.
For More Information On This Product,
0 = Do not halt Flash EEPROM clock when the part is in wait mode.
1 = Halt Flash EEPROM clock when the part is in wait mode.
0 = Voltage of V
1 = Voltage of V
0 = Flash EEPROM configured for programming
1 = Flash EEPROM configured for erasure
5
0
0
Go to: www.freescale.com
FEESWAI
Flash Memory
FP
4
0
Voltage
FP
FP
pin is above normal programming voltage levels
pin is below normal programming voltage levels
SVFP
3
0
Table 7-1
ERAS
2
0
Table 7-1
for more information. Status of
LAT
1
0
Flash EEPROM Registers
for the effects of LAT
FP
ENPE
Bit 0
pin will prevent
0
Technical Data
Flash Memory
$00F7
113
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