mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 222

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Enhanced Capture Timer
TCTL2 — Timer Control Register 2
Technical Data
222
RESET:
OM3
Bit 7
NOTE:
0
OL3
6
0
Read or write anytime.
OMn — Output Mode
OLn — Output Level
To enable output action by OMn and OLn bits on the timer port, the
corresponding bit in OC7M should be cleared.
Freescale Semiconductor, Inc.
These eight pairs of control bits are encoded to specify the output
action to be taken as a result of a successful OCn compare. When
either OMn or OLn is one, the pin associated with OCn becomes an
output tied to OCn regardless of the state of the associated DDRT bit.
To operate the 16-bit pulse accumulators A and B (PACA and PACB)
independently of input capture or output compare 7 and 0 respectively
the user must set the corresponding bits IOSn = 1, OMn = 0 and OLn
= 0. OC7M7 or OC7M0 in the OC7M register must also be cleared.
For More Information On This Product,
OM2
5
0
OMn
Go to: www.freescale.com
0
0
1
1
Table 13-1. Compare Result Output Action
Enhanced Capture Timer
OL2
4
0
OLn
0
1
0
1
OM1
3
0
Timer disconnected from output pin logic
Clear OCn output line to zero
Set OCn output line to one
Toggle OCn output line
OL1
2
0
Action
MC68HC912DG128 — Rev 3.0
OM0
1
0
Bit 0
OL0
0
MOTOROLA
$0089