mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 324

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MSCAN Controller
17.7 Protocol Violation Protection
Technical Data
324
The msCAN12 will protect the user from accidentally violating the CAN
protocol through programming errors. The protection logic implements
the following features:
Freescale Semiconductor, Inc.
For More Information On This Product,
The receive and transmit error counters cannot be written or
otherwise manipulated.
All registers which control the configuration of the msCAN12
cannot be modified while the msCAN12 is on-line. The SFTRES
bit in CMCR0 (see
(CMCR0)) serves as a lock to protect the following registers:
– msCAN12 module control register 1 (CMCR1)
– msCAN12 bus timing register 0 and 1 (CBTR0, CBTR1)
– msCAN12 identifier acceptance control register (CIDAC)
– msCAN12 identifier acceptance registers (CIDAR0–7)
– msCAN12 identifier mask registers (CIDMR0–7)
The TxCAN pin is forced to recessive when the msCAN12 is in any
of the low power modes.
Function
Interrupts
Wake-Up
Transmit
Receive
Error
Go to: www.freescale.com
Table 17-1. msCAN12 Interrupt Vectors
MSCAN Controller
msCAN12 Module Control Register 0
RWRNIF
TWRNIF
RERRIF
TERRIF
BOFFIF
Source
WUPIF
OVRIF
TXE0
TXE1
TXE2
RXF
Local Mask
RWRNIE
TWRNIE
RERRIE
TERRIE
BOFFIE
TXEIE0
TXEIE1
TXEIE2
WUPIE
OVRIE
RXFIE
MC68HC912DG128 — Rev 3.0
Global Mask
I Bit
MOTOROLA

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