mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 175

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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PLLCR — PLL Control Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
1. Set when VDDPLL power supply is high. Forced to 0 when VDDPLL is low.
2. Cleared when VDDPLL power supply is high. Forced to 1 when VDDPLL is low.
RESET:
LOCKIE
Bit 7
0
PLLON
6
(1)
LOCK — Locked Phase Lock Loop Circuit
LHIF — Limp-Home Interrupt Flag
LHOME — Limp-Home Mode Status
For Limp-Home mode, see
Read and write anytime. Exceptions are listed below for each bit.
LOCKIE — PLL LOCK Interrupt Enable
Freescale Semiconductor, Inc.
Regardless of the bandwidth control mode (automatic or manual):
Write has no effect on LOCK bit. This bit is cleared in limp-home mode as
the lock detector cannot operate without the reference frequency.
To clear the flag, write one to this bit in PLLFLG.
Forced to 0 when VDDPLL=0.
For More Information On This Product,
0 = PLL VCO is not within the desired tolerance of the target
1 = After the phase lock loop circuit is turned on, indicates the PLL
0 = No change in LHOME bit.
1 = LHOME condition has changed, either entered or exited limp-
0 = MCU is operating normally, with EXTALi clock available for
1 = Loss of reference clock. CGM delivers PLL VCO limp-home
0 = PLL LOCK interrupt is disabled
1 = PLL LOCK interrupt is enabled
AUTO
5
1
frequency.
VCO is within the desired tolerance of the target frequency.
home mode.
generating clocks or as PLL reference.
frequency to the MCU.
Go to: www.freescale.com
ACQ
Clock Functions
4
0
Limp-Home and Fast STOP Recovery
3
0
0
Limp-Home and Fast STOP Recovery modes
PSTP
2
0
LHIE
1
0
NOLHM
Bit 0
(2)
Clock Functions
Technical Data
modes.
$003C
175

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