mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 241

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

TIMTST — Timer Test Register
PORTT — Timer Port Data Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
RESET:
TIMER
PORT
I/OC7
BIT 7
BIT 7
PT7
0
0
0
I/OC6
PT6
6
0
0
6
0
Read: any time
Write: only in special mode (SMOD = 1).
TCBYP — Main Timer Divider Chain Bypass
Since the Output Compare 7 shares the pin with Pulse Accumulator
input, the only way for Pulse accumulator to receive an independent
input from Output Compare 7 is setting both OM7 & OL7 to be zero, and
also OC7M7 in OC7M register to be zero.
Freescale Semiconductor, Inc.
Read: any time (inputs return pin level; outputs return data register
contents)
Write: data stored in an internal latch (drives pins only if configured for
output)
For More Information On This Product,
0 = Normal operation
1 = For testing only. The 16-bit free-running timer counter is divided
I/OC5
PT5
5
0
0
5
0
into two 8-bit halves and the prescaler is bypassed. The clock
drives both halves directly.
When the high byte of timer counter TCNT ($84) overflows
from $FF to $00, the TOF flag in TFLG2 ($8F) will be set.
Go to: www.freescale.com
Enhanced Capture Timer
I/OC4
PT4
4
0
0
4
0
I/OC3
PT3
3
0
0
3
0
I/OC2
PT2
2
0
0
2
0
TCBYP
I/OC1
PT1
1
0
1
0
Enhanced Capture Timer
I/OC0
BIT 0
BIT 0
PT0
0
0
0
Timer Registers
Technical Data
$00AD
$00AE
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