mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 265

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

14.5.3 SS Output
MC68HC912DG128 — Rev 3.0
MOTOROLA
SCK (CPOL=0)
SCK (CPOL=1)
SAMPLE I
(MOSI/MISO)
CHANGE O
CHANGE O
SEL SS (O)
(Master only)
SEL SS (I)
(MOSI pin)
(MISO pin)
MSB first (LSBF=0):
LSB first (LSBF=1):
Transfer
t
L
Available in master mode only, SS output is enabled with the SSOE bit
in the SP0CR1 register if the corresponding DDRS is set. The SS output
pin will be connected to the SS input pin of the external slave device. The
SS output automatically goes low for each transmission to select the
external device and it goes high during each idling state to deselect
external devices.
Figure 14-5. SPI Clock Format 1 (CPHA = 1)
MSB
LSB
Freescale Semiconductor, Inc.
For More Information On This Product,
DDS7
Begin
Bit 6
Bit 1
0
0
1
1
Go to: www.freescale.com
Multiple Serial Interface
Bit 5
Bit 2
SSOE
Table 14-3. SS Output Selection
0
1
0
1
Bit 4
Bit 3
SS Input with MODF Feature
General-Purpose Output
Bit 3
Bit 4
Master Mode
SS Output
Reserved
Bit 2
Bit 5
Bit 1
Bit 6
End
Serial Peripheral Interface (SPI)
MSB
LSB
Multiple Serial Interface
t
T
Slave Mode
Minimum 1/2 SCK
SS Input
SS Input
SS Input
SS Input
t
I
for t
Technical Data
T
t
L
, t
l
, t
L
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