mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 112

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Flash Memory
Technical Data
112
VTCK — V
STRE — Spare Test Row Enable
MWPR — Multiple Word Programming
Freescale Semiconductor, Inc.
When VTCK is set, the Flash EEPROM module uses the V
control the control gate voltage; the sense amp time-out path is
disabled. This allows for indirect measurements of the bit cells
program and erase threshold. If V
control gate will equal the V
If V
equation:
The spare test row consists of one Flash EEPROM array row. The
reserved word at location 31 contains production test information
which must be maintained through several erase cycles. When STRE
is set, the decoding for the spare test row overrides the address lines
which normally select the other rows in the array.
Used primarily for testing, if MWPR = 1, the two least-significant
address lines ADDR[1:0] will be ignored when programming a Flash
EEPROM location. The word location addressed if ADDR[1:0] = 00,
along with the word location addressed if ADDR[1:0] = 10, will both be
programmed with the same word data from the programming latches.
This bit should not be changed during programming.
For More Information On This Product,
0 = V
1 = V
0 = LIB accesses are to the Flash EEPROM array
1 = Spare test row in array enabled if SMOD is active
0 = Multiple word programming disabled
1 = Program 32 bits of data
FP
> V
T
T
T
Go to: www.freescale.com
ZBRK
test disable
test enable
Check Test Enable
Vcontrol gate = V
Flash Memory
the control gate will be regulated by the following
FP
ZBRK
voltage.
FP
< V
0.44
ZBRK
MC68HC912DG128 — Rev 3.0
(V
(breakdown voltage) the
FP
V
ZBRK
)
MOTOROLA
FP
pin to