mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 260

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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SC0DRH/SC1DRH — SCI Data Register High
SC0DRL/SC1DRL — SCI Data Register Low
Multiple Serial Interface
SC0SR2/SC1SR2 — SCI Status Register 2
SC0DRH/SC1DRH — SCI Data Register High
Technical Data
260
RESET:
RESET:
RESET:
RESET:
R7/T7
Bit 7
Bit 7
Bit 7
Bit 7
R8
0I
R8
0
R6/T6
T8
T8
6
0
0
6
6
6
Read anytime. Write has no meaning or effect.
RAF — Receiver Active Flag
Freescale Semiconductor, Inc.
This bit is controlled by the receiver front end. It is set during the RT1
time period of the start bit search. It is cleared when an idle state is
detected or when the receiver circuitry detects a false start bit
(generally due to noise or baud rate mismatch).
If enabled with RIE = 1, RAF set generates an interrupt when
VDDPLL is high while in WAIT mode.
For More Information On This Product,
0 = A character is not being received
1 = A character is being received
R5/T5
5
0
0
5
0
5
0
5
Go to: www.freescale.com
Multiple Serial Interface
R4/T4
4
0
0
4
0
4
0
4
R3/T3
3
0
0
3
0
3
0
3
R2/T2
2
0
0
2
0
2
0
2
MC68HC912DG128 — Rev 3.0
R1/T1
1
0
0
1
0
1
0
1
R0/T0
Bit 0
RAF
Bit 0
Bit 0
Bit 0
0
0
0
$00C6/$00CE
$00C5/$00CD
$00C7/$00CF
$00C6/$00CE
MOTOROLA

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