HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 99

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

3.3 Assigners
The data flow block diagram in Figure 3.1 contains three assigners. These functional blocks are used
to connect FIFOs, HFC-channels and S/T-channels and PCM time slots respectively with each other.
3.3.1 HFC-channel assigner
The channel assigner functionality depends on the data flow mode described in Section3.4.
3.3.2 PCM slot assigner
The PCM slot assigner can connect each HFC-channel to an arbitrary PCM time slot. Therefore, for
a specified time slot
register A_SL_CFG[SLOT] as follows:
Typically, the data direction of a HFC-channel and its connected slot is the same. However, for a
direct connection between a PCM time slot and an S/T-channel, transmit and receive direction have
to be connected.
If two PCM time slots are connected to each other, incoming data on a PCM time slot is transferred to
the PCM slot assigner and stored in the PCM receive switching buffer of the connected HFC-channel.
From there it is read (i.e. same HFC-channel) and transmitted to a transmit PCM time slot which is
also connected to the HFC-channel.
3.3.3 S/T interface assigner
Table 3.4 shows the assignment between HFC-channels and the S/T-channels. There is no possibility
to change this allocation, so there are no registers for programming the S/T interface assigner.
“bidirectional connection” is used in this data sheet.
slot array registers belong to this time slot. Please see Chapter 6 for details.
March 2003 (rev. A)
HFC-4S
HFC-8S
4
A time slot is specified by writing its number and data direction into the register R_SLOT. Then all accesses to the
A_SL_CFG : V_CH_DIR1[SLOT]
Table 3.3: V _ DATA _ FLOW programming values for single-destination connections
Connection
FIFO
FIFO
FIFO
FIFO
S/T
S/T
4
the connected HFC-channel number and data direction must be written into the
: V_CH_NUM1[SLOT]
S/T
S/T
PCM
PCM
PCM
PCM
V_DATA_FLOW
Required
’10x’
’x00’
’01x’
’x01’
’11x’
’x10’
Data Sheet
Data flow
V_DATA_FLOW
HFC-channel data direction
HFC-channel number
Equalized
’100’
’011’
’001’
’110’
Data
direction
transmit
receive
receive
transmit
receive
transmit
Cologne
Chip
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