HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 104

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
3.4.2 Channel Select Mode
The Channel Select Mode (CSM) allows an arbitrary assignment between a FIFO and the connected
HFC-channel as shown in Figure 3.6 (left side). Beyond this, it is possible to connect several FIFOs
to one HFC-channel (Fig. 3.6, right side). This works in transmit and receive direction and can be
used to allocate only one 8 kByte/s S/T-channel or PCM time slot with multiple data streams with
lower data rate of the assigned FIFOs. In this case the subchannel processor is involved.
The Channel Select Mode is selected with V_CSM_MD
R_FIFO_MD.
Channel assigner
The connection between a FIFO and a HFC-channel can be established by the A_CHANNEL reg-
ister for each FIFO. For a specified FIFO, the HFC-channel to be connected must be written to
V_CH_NUM0. Typically, the data direction in V_CH_DIR0 is the same as the FIFO data direc-
tion V_FIFO_DIR in the register R_FIFO. With the register settings
104 of 273
G
In Simple Mode for every used FIFO[
valid in reverse case, too.
Rule
FIFO
FIFO
R_FIFO
A_CON_HDLC[12,TX] : V_DATA_FLOW
R_SLOT
A_SL_CFG[22,TX]
R_FIFO
A_CON_HDLC[12,RX] : V_DATA_FLOW
R_SLOT
A_SL_CFG[22,RX]
assigner
assigner
channel
channel
Figure 3.6: Channel assigner in CSM
Channel
: V_FIFO_DIR
: V_FIFO_NUM
: V_SL_DIR
: V_SL_NUM
: V_CH_DIR1
: V_CH_NUM1
: V_FIFO_DIR
: V_FIFO_NUM
: V_SL_DIR
: V_SL_NUM
: V_CH_DIR1
: V_CH_NUM1
Data Sheet
Data flow
Ò
] the HFC-channel[
FIFOs
0
’110’
0
1
12
22
12
1
12
’110’
1
22
0
12
½
and V_FSM_MD
Assigner
Assigner
channel
channel
Ò
(transmit FIFO)
(S/T
(transmit slot)
(receive HFC-channel)
] is also used. This is
(FIFO #12)
(slot #22)
(HFC-channel #12)
(receive FIFO)
(S/T
(receive slot)
(transmit HFC-channel)
(FIFO #12)
(slot #22)
(HFC-channel #12)
PCM)
PCM)
March 2003 (rev. A)
Channel
Channel
¼
in the register
Cologne
Chip