HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 89

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-4S
HFC-8S
R_RAM_ADDR2
Address pointer, register 2
High address bits for internal / external SRAM access and access configuration.
3..0
5..4
6
7
Bits
0
0
0
Value
Reset
V_RAM_ADDR2
(reserved)
V_ADDR_RES
V_ADDR_INC
Name
Universal external bus interface
(write only)
Data Sheet
Description
Address bits 19 . . . 16
Must be ’00’.
Address reset
’0’ = normal operation
’1’ = address bits 0 . . . 15 are set to zero
This bit is automatically cleared.
Address increment
’0’ = no address increment
’1’ = automatically increment of the address after
every write or read on register R_RAM_DATA
Cologne
Chip
89 of 273
0x0A