HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 187

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-4S
HFC-8S
R_SH0L
CODEC enable signal SHAPE0, low byte
This multi-register is selected with bitmap V_PCM_ADDR = 0xC of the register
R_PCM_MD0.
7..0
R_SH0H
CODEC enable signal SHAPE0, high byte
This multi-register is selected with bitmap V_PCM_ADDR = 0xD of the register
R_PCM_MD0.
7..0
R_SH1L
CODEC enable signal SHAPE1, low byte
This multi-register is selected with bitmap V_PCM_ADDR = 0xE of the register
R_PCM_MD0.
7..0
Bits
Bits
Bits
0
0
0
Value
Value
Value
Reset
Reset
Reset
V_SH0L
V_SH0H
V_SH1L
Name
Name
Name
PCM interface
(write only)
(write only)
(write only)
Data Sheet
Description
Shape bits 7 . . . 0
Every bit is used for 1/2 C4IO clock cycle.
Description
Shape bits 15 . . . 8
Every bit is used for 1/2 C4IO clock cycle.
Bit 7 of V_SH0H defines the value for the rest of
the period.
Description
Shape bits 7 . . . 0
Every bit is used for 1/2 C4IO clock cycle.
Cologne
Chip
187 of 273
0x15
0x15
0x15