HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 118

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HFC-4S

Manufacturer Part Number
HFC-4S
Description
Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
Manufacturer
Cologne Chip AG
Datasheet
HFC-4S
HFC-8S
3.6 Register description
118 of 273
R_FIRST_FIFO
First FIFO of the FIFO sequence
This register is only used in FIFO Sequence Mode, see register R_FIFO_MD for mode
selection.
0
5..1
7..6
Bits
0x00
0
Value
Reset
Name
V_FIRST_FIFO_DIR
V_FIRST_FIFO_NUM
(reserved)
(write only)
Data Sheet
Data flow
Description
Data direction
FIFO number
Must be ’00’.
This bit defines the data direction of the first FIFO
in FIFO sequence.
’0’ = transmit FIFO data
’1’ = receive FIFO data
This bitmap defines the number of the first FIFO in
FIFO sequence.
March 2003 (rev. A)
Cologne
Chip
0x0B

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