HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 192

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
The HFC-4S / 8S has two PWM output lines PWM0 and PWM1 with programmable output charac-
teristic.
The output lines can be configured as open drain, open source and push / pull by setting V_PWM0_MD
respectively V_PWM1_MD in the register R_PWM_MD.
7.1 Standard PWM usage
The duty cycle of the output signals can be set in the registers R_PWM0 and R_PWM1. The register
value 0 generates an output signal which is permanently low. The register value defines the number
of clock periods where the output signal is high during the cycle time
for the normal system clock 24.576 MHz.
The ouput signal of the PWM unit can be used for analog settings by using an external RC filter which
generates a voltage that can be adapted by changing the PWM register value.
7.2 Alternative PWM usage
The PWM output lines can be programmed to generate a 16 kHz signal. This signal can be used as
analog metering pulse for POTS interfaces. Each PWM output line can be switched to 16 kHz signal
by setting V_PWM0_16KHZ or V_PWM1_16KHZ in the register R_RAM_MISC. In this case the
output characteristic is also determined by the R_PWM_MD register settings.
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Data Sheet
PWM
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March 2003 (rev. A)
Cologne
Chip