HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 188

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HFC-4S

Manufacturer Part Number
HFC-4S
Description
Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
Manufacturer
Cologne Chip AG
Datasheet
HFC-4S
HFC-8S
188 of 273
R_SH1H
CODEC enable signal SHAPE1, high byte
This multi-register is selected with bitmap V_PCM_ADDR = 0xF of the register
R_PCM_MD0.
7..0
Bits
0
Value
Reset
Name
V_SH1H
PCM interface
(write only)
Data Sheet
Description
Shape bits 15 . . . 8
Every bit is used for 1/2 C4IO clock cycle.
Bit 7 of V_SH1H defines the value for the rest of
the period.
March 2003 (rev. A)
Cologne
Chip
0x15

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