HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 165

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-4S
HFC-8S
A_ST_CTRL2 [ST]
Control register of the selected S/T interface, register 2
Before writing this array register the S/T interface must be selected by register R_ST_SEL.
0
1
5..2
6
7
A_ST_SQ_WR [ST]
S/Q multiframe register
Before writing this array register the S/T interface must be selected by register R_ST_SEL.
3..0
7..4
Bits
Bits
0
0
0
0
Value
Value
Reset
Reset
V_B1_RX_EN
V_B2_RX_EN
(reserved)
V_ST_TRIS
V_ST_SQ
Name
(reserved)
Name
(reserved)
S/T interface
(write only)
(write only)
Data Sheet
Description
Enable B1-channel receive
’0’ = B1 receive bits are forced to ’1’
’1’ = normal operation
Enable B2-channel receive
’0’ = B2 receive bits are forced to ’1’
’1’ = normal operation
Must be ’0000’.
S/T ouput buffer tristated
’0’ = normal operation
’1’ = set S/T output buffer into tristate mode
Must be ’0’.
Description
S/Q bits
TE mode: bits [3 . . . 0] are Q bits [Q1,Q2,Q3,Q4]
NT mode: bits [3 . . . 0] are S bits [S1,S2,S3,S4]
Must be ’0000’.
Cologne
Chip
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