ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 81

• Manufacturer Part Number: ISP1561BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1561BMUM

• Controller Type: USB Peripheral Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1561BM-T; ISP1561BM-T

NXP Semiconductors
ISP1561_2
Product data sheet
Table 119. PORTSC 1, 2, 3, 4 register: bit description
Bit
19 to 16 PTC[3:0]
15 to 14 PIC[1:0]
13
12
11 to 10 LS[1:0]
Symbol
PO
PP
Description
Port Test Control: Default = 0000b. When this field is logic 0, the port is not
operating in test mode. A nonzero value indicates that it is operating in test
mode and test mode is indicated by the value. The encoding of test mode
bits are:
0000b — test mode disabled
0001b — test J_STATE
0010b — test K_STATE
0011b — test SE0_NAK
0100b — test packet
0101b — test FORCE_ENABLE
0110b to 1111b — reserved
Port Indicator Control: Default = 0. Writing to this field has no effect if the
P_INDICATOR bit in the HCSPARAMS register is logic 0. If P_INDICATOR
bit is logic 1, then the bit encoding is:
00b — Port indicators are off
01b — amber
10b — green
11b — undefined
For a description on how these bits are implemented, refer to
“Universal Serial Bus
Port Owner: Default = 1. This bit unconditionally goes to logic 0 when the
Configured bit in the CONFIGFLAG register makes logic 0 to logic 1
transition. This bit unconditionally goes to logic 1 whenever the Configured
bit is logic 0. The system software uses this field to release ownership of the
port to a selected Host Controller, if the attached device is not a high-speed
device. Software writes logic 1 to this bit when the attached device is not a
high-speed device. Logic 1 in this bit means that a companion Host
Controller owns and controls the port.
Port Power: The function of this bit depends on the value of the Port Power
Control (PPC) field in the HCSPARAMS register.
If PPC = 0 and PP = 1 — The Host Controller does not have port power
control switches. Each port is hardwired to power.
If PPC = 1 and PP = 1 or 0 — The Host Controller has port power control
switches. This bit represents the current setting of the switch: logic 0 = off,
logic 1 = on. When PP is logic 0, the port is nonfunctional and will not report
any status
When an overcurrent condition is detected on a powered port and PPC is
logic 1, the PP bit in each affected port may be changed by the Host
Controller from logic 1 to logic 0, removing power from the port.
Line Status: This field reflect the current logical levels of the DP (bit 11) and
DM (bit 10) signal lines. These bits are used to detect low-speed USB
devices before the port reset and enable sequence. This field is valid only
when the Port Enable bit is logic 0, and the current connect status bit is set
to logic 1.
00b — SE0: Not a low-speed device, perform EHCI reset
01b — K-state: Low-speed device, release ownership of port
10b — J-state: Not a low-speed device, perform EHCI reset
11b — undefined: Not a low-speed device, perform EHCI reset.
If Port Power (PP) is logic 0, this field is undefined.
Rev. 02 — 5 March 2007
Specification”.
…continued
[1]
HS USB PCI Host Controller
© NXP B.V. 2007. All rights reserved.
ISP1561
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