ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 45

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ISP1561BMUM

Manufacturer Part Number
ISP1561BMUM
Description
IC USB HOST CTRL HI-SPD 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1561BMUM

Controller Type
USB Peripheral Controller
Interface
PCI
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
ISP1561BM-T
ISP1561BM-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1561BMUM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
ISP1561BMUM
Manufacturer:
ST
0
NXP Semiconductors
ISP1561_2
Product data sheet
11.1.7 HcHCCA register (address: content of the base address register + 18h)
Table 54.
The HcHCCA register contains the physical address of Host Controller Communication
Area (HCCA). The bit allocation is given in
restrictions by writing all 1s to HcHCCA and reading the content of HcHCCA. The
alignment is evaluated by examining the number of zeroes in the lower order bits. The
minimum alignment is 256 bytes; therefore, bits 0 through 7 will always return logic 0
when read. This area is used to hold control structures and the Interrupt table that are
accessed by both the Host Controller and the HCD.
Bit
31
30
29 to 7
6
5
4
3
2
1
0
HcInterruptDisable register: bit description
Symbol
MIE
OC
-
RHSC
FNO
UE
RD
SF
WDH
SO
Rev. 02 — 5 March 2007
Description
Master Interrupt Enable:
0 — Ignore
1 — Disables interrupt generation because of events specified in other
bits of this register.
This field is set after a hardware or software reset. Interrupts are
disabled.
Ownership Change:
0 — Ignore
1 — Disables interrupt generation because of ownership change
reserved
Root Hub Status Change:
0 — Ignore
1 — Disables interrupt generation because of root hub status change
Frame Number Overflow:
0 — Ignore
1 — Disables interrupt generation because of frame number overflow
Unrecoverable Error:
0 — Ignore
1 — Disables interrupt generation because of unrecoverable error
Resume Detect:
0 — Ignore
1 — Disables interrupt generation because of resume detect
Start-of-Frame:
0 — Ignore
1 — Disables interrupt generation because of Start-of-Frame
HcDoneHead Write-back:
0 — Ignore
1 — Disables interrupt generation because of HcDoneHead
write-back
Scheduling Overrun:
0 — Ignore
1 — Disables interrupt generation because of scheduling overrun
Table
55. The HCD determines alignment
HS USB PCI Host Controller
© NXP B.V. 2007. All rights reserved.
ISP1561
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