ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 8

• Manufacturer Part Number: ISP1561BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1561BMUM

• Controller Type: USB Peripheral Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1561BM-T; ISP1561BM-T

NXP Semiconductors
ISP1561_2
Product data sheet
Table 2.
Symbol
V
AD[19]
AD[18]
AD[17]
DGND
AD[16]
C/BE#[2]
FRAME#
V
IRDY#
TRDY#
DEVSEL#
DGND
STOP#
CLKRUN#
PERR#
V
SERR#
PAR
C/BE#[1]
DGND
AD[15]
AD[14]
AD[13]
V
AD[12]
AD[11]
AD[10]
DGND
AD[9]
AD[8]
C/BE#[0]
DD
DD
DD
DD
[1]
Pin description
Pin
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Type
-
I/O
I/O
I/O
-
I/O
I/O
I/O
-
I/O
I/O
I/O
-
I/O
I/O
I/O
-
O
I/O
I/O
-
I/O
I/O
I/O
-
I/O
I/O
I/O
-
I/O
I/O
I/O
Rev. 02 — 5 March 2007
…continued
Description
supply voltage (3.3 V)
bit 19 of multiplexed PCI address and data
bit 18 of multiplexed PCI address and data
bit 17 of multiplexed PCI address and data
digital ground
bit 16 of multiplexed PCI address and data
byte 2 of multiplexed PCI bus command and byte enable
PCI cycle frame; driven by the master to indicate the beginning
and duration of an access
supply voltage (3.3 V)
PCI initiator ready; indicates ability of the initiating agent to
complete the current data phase of a transaction
PCI target ready; indicates ability of the target agent to complete
the current data phase of a transaction
PCI device select; indicates if any device has been selected on
the bus
digital ground
PCI stop; indicates that the current target is requesting the
master to stop the current transaction
PCI CLKRUN signal
push-pull input; 3-state output; 5 ns slew rate control; TTL with
hysteresis; 5 V tolerant
PCI parity error; used to report data parity errors during all PCI
transactions, except a special cycle
supply voltage (3.3 V)
PCI system error; used to report address parity errors, data parity
errors on the Special Cycle command, or any other system error
where the result will be catastrophic
push-pull; open-drain; 10 ns slew rate control; CMOS; 5 V
tolerant
PCI parity
byte 1 of multiplexed PCI bus command and byte enable
digital ground
bit 15 of multiplexed PCI address and data
bit 14 of multiplexed PCI address and data
bit 13 of multiplexed PCI address and data
supply voltage (3.3 V)
bit 12 of multiplexed PCI address and data
bit 11 of multiplexed PCI address and data
bit 10 of multiplexed PCI address and data
digital ground
bit 9 of multiplexed PCI address and data
bit 8 of multiplexed PCI address and data
byte 0 of multiplexed PCI bus command and byte enable
HS USB PCI Host Controller
© NXP B.V. 2007. All rights reserved.
ISP1561
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