ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 27

• Manufacturer Part Number: ISP1561BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1561BMUM

• Controller Type: USB Peripheral Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1561BM-T; ISP1561BM-T

NXP Semiconductors
ISP1561_2
Product data sheet
8.2.3.4 PMCSR register (address: value read from address 34h + 4h)
Table 35.
The logic level of the AMB4 pin at power-on determines the default value of PMC
registers. If this pin is connected to V
the case of notebook design). If this pin is left open or is pulled down, then the ISP1561
does not support D3
The Power Management Control/Status (PMCSR) register is a 2-byte register used to
manage the power management state of the PCI function, as well as to allow and monitor
Power Management Events (PMEs). The bit allocation of the register is given in
Bit
8 to 6
5
4
3
2 to 0
PMC register: bit description
Symbol
AUX_C[2:0]
DSI
-
PMI
VER[2:0]
cold
Rev. 02 — 5 March 2007
(in the case of PCI add-on card design).
Description
Auxiliary Current: This three-bit field reports the V
current requirements for the PCI function.
If the Data register is implemented by this function:
If the PME# generation from D3
function (PMC[15] = 0), this field must return a value of 000b when
read.
For functions that support PME# from D3
the Data register, bit assignments correspond to the maximum
current required for V
111b — 375 mA
110b — 320 mA
101b — 270 mA
100b — 220 mA
011b — 160 mA
010b — 100 mA
001b — 55 mA
000b — 0 (self-powered)
Device Specific Initialization: This bit indicates whether special
initialization of this function is required, beyond the standard PCI
configuration header, before the generic class device driver can
use it.
Remark: This bit is not used by some operating systems. For
example, Microsoft Windows and Windows NT do not use this bit
to determine whether to use D3. Instead, it is determined using
the capabilities of the driver.
Logic 1 indicates that the function requires a device-specific
initialization sequence, following transition to D0 uninitialized state.
reserved
PME Clock: When this bit is logic 1, it indicates that the function
relies on the presence of the PCI clock for the PME# operation.
When this bit is logic 0, it indicates that no PCI clock is required for
the function to generate PME#. Functions that do not support the
PME# generation in any state must return logic 0 for this field.
Version: A value of 010b indicates that this function complies with
Ref. 5 “PCI Bus Power Management Interface
•
•
A read from this field needs to return a value of 000b.
The Data register takes precedence over this field for V
current requirement reporting.
DD
…continued
as a pull-up, then the ISP1561 supports D3
AUX
are:
cold
HS USB PCI Host Controller
is not supported by the
cold
and do not implement
Specification”.
© NXP B.V. 2007. All rights reserved.
ISP1561
AUX
auxiliary
Table
26 of 103
cold
AUX
36.
(in