ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 29

• Manufacturer Part Number: ISP1561BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1561BMUM

• Controller Type: USB Peripheral Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1561BM-T; ISP1561BM-T

NXP Semiconductors
Table 38.
[1]
ISP1561_2
Product data sheet
Bit
Symbol
Reset
Access
Internally hardwired.
PMCSR_BSE register: bit allocation
8.2.3.5 PMCSR_BSE register (address: value read from address 34h + 6h)
BPCC_EN
0
R
7
[1]
Table 37.
The PMCSR PCI-to-PCI Bridge Support Extensions (PMCSR_BSE) register supports PCI
bridge-specific functionality and is required for all PCI-to-PCI bridges. The bit allocation of
this register is given in
Table 39.
Bit
1 to 0
Bit
7
6
5 to 0
B2_B3#
0
R
6
Symbol
BPCC_EN
B2_B3#
-
[1]
PMCSR register: bit description
PMCSR_BSE register: bit description
Symbol
PS[1:0]
Description
Bus Power or Clock Control Enable
1 — Indicates that the bus power or clock control mechanism as defined in
Table 40
0 — Indicates that the bus power or control policies as defined in
are disabled.
When the bus power or clock control mechanism is disabled, the bridge’s
PMCSR PS (Power State) field cannot be used by the system software to
control the power or clock of the bridge’s secondary bus.
B2 or B3 support for D3
is to occur as a direct result of programming the function to D3
1 — Indicates that when the bridge function is programmed to D3
secondary bus’s PCI clock will be stopped (B2).
0 — Indicates that when the bridge function is programmed to D3
secondary bus will have its power removed (B3).
This bit is only meaningful if bit 7 (BPCC_EN) is logic 1.
reserved
R
5
0
Table
Rev. 02 — 5 March 2007
Description
Power State: This two-bit field is used to determine the current power
state of the EHCI function and to set the function into a new power
state. The definition of the field values is given as:
00b — for D0
01b — for D1
10b — for D2
11b — for D3
If the software attempts to write an unsupported, optional state to this
field, the write operation must complete normally on the bus; however,
the data is discarded and no status change occurs.
is enabled.
38.
R
4
0
hot
…continued
hot
R
3
0
: The state of this bit determines the action that
reserved
R
2
0
HS USB PCI Host Controller
R
1
0
© NXP B.V. 2007. All rights reserved.
ISP1561
hot
.
hot
hot
Table 40
, its
, its
28 of 103
R
0
0