ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 80

• Manufacturer Part Number: ISP1561BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1561BMUM

• Controller Type: USB Peripheral Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1561BM-T; ISP1561BM-T

NXP Semiconductors
Table 118. PORTSC 1, 2, 3, 4 register: bit allocation
ISP1561_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
11.4.9 PORTSC registers 1, 2, 3, 4 (address: content of the base address register +
reserved
SUSP
R/W
31
23
15
R
0
0
0
7
0
-
-
PIC[1:0]
50h + (4 times Port Number
The Port Status and Control (PORTSC) register (bit allocation:
auxiliary power well. It is only reset by hardware when the auxiliary power is initially
applied or in response to a Host Controller reset. The initial conditions of a port are:
If the port has power control, software cannot change the state of the port until it sets port
power bits. Software must not attempt to change the state of the port until power is stable
on the port; maximum delay is 20 ms from the transition.
Table 119. PORTSC 1, 2, 3, 4 register: bit description
Bit
31 to 23 -
22
21
20
•
•
No device connected
Port disabled
WKOC_E
FPR
R/W
R/W
30
22
14
R
0
0
0
6
0
-
Symbol
WKOC_E
WKDS
CNNT_E
WKCNNT
_E
CNNT_E
WKDS
OCC
R/W
R/W
PO
29
21
13
R
Description
reserved
Wake on Overcurrent Enable: Default = 0. Setting this bit enables the port
to be sensitive to overcurrent conditions as wake-up events.
Wake on Disconnect Enable: Default = 0. Setting this bit enables the port
to be sensitive to device disconnects as wake-up events.
Wake on Connect Enable: Default = 0. Setting this bit enables the port to
be sensitive to device connects as wake-up events.
0
0
1
5
0
-
Rev. 02 — 5 March 2007
WKCNNT_
OCA
R/W
R/W
PP
28
20
12
R
0
E
0
0
4
0
-
1)) where Port Number is 1, 2, 3,...N_Ports
reserved
PEDC
R/W
R/W
R/W
27
19
11
0
0
0
3
0
-
LS[1:0]
PED
R/W
R/W
R/W
26
18
10
0
0
0
2
0
-
HS USB PCI Host Controller
PTC[3:0]
Table
[1]
reserved
ECSC
R/W
R/W
118) is in the
25
17
0
0
9
0
1
0
-
-
© NXP B.V. 2007. All rights reserved.
[1]
ISP1561
[1]
ECCS
R/W
79 of 103
PR
24
16
R
R
0
0
8
0
0
0
-