ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 57

• Manufacturer Part Number: ISP1561BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1561BMUM

• Controller Type: USB Peripheral Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1561BM-T; ISP1561BM-T

NXP Semiconductors
Table 81.
ISP1561_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRhDescriptorB register: bit allocation
11.1.21 HcRhStatus register (address: content of the base address register + 50h)
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
Table 82.
The HcRhStatus register is divided into two parts. The lower word of a DWORD
represents the Hub Status field and the upper word represents the Hub Status Change
field. Reserved bits must always be written as logic 0.
of the register.
Bit
31 to 16
15 to 0
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
HcRhDescriptorB register: bit description
Symbol
PPCM[15:0]
DR[15:0]
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 02 — 5 March 2007
Description
Port Power Control Mask: Each bit indicates whether a port is
affected by a global power control command when Power Switching
Mode is set. When set, the power state of the port is only affected
by per-port power control (Set/Clear Port Power). When cleared, the
port is controlled by the global power switch (Set/Clear Global
Power). If the device is configured to global switching mode (Power
Switching Mode = 0), this field is not valid.
Bit 0 — reserved
Bit 1 — Ganged-power mask on port #1
Bit 2 — Ganged-power mask on port #2
Device Removable: Each bit is dedicated to a port of the root hub.
When cleared, the attached device is removable. When set, the
attached device is not removable.
Bit 0 — reserved
Bit 1 — Device attached to port #1
Bit 2 — Device attached to port #2
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
PPCM[15:8]
PPCM[7:0]
DR[15:8]
DR[7:0]
R/W
R/W
R/W
27
19
11
R
0
0
0
3
0
Table 83
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
HS USB PCI Host Controller
contains the bit allocation
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1561
R/W
R/W
R/W
R/W
56 of 103
24
16
0
0
8
0
0
0