ISP1561BMUM ST-Ericsson Inc, ISP1561BMUM Datasheet - Page 103

• Manufacturer Part Number: ISP1561BMUM
• Description: IC USB HOST CTRL HI-SPD 128LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1561BMUM

• Controller Type: USB Peripheral Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1561BM-T; ISP1561BM-T

NXP Semiconductors
26. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
8
8.1
8.1.1
8.1.2
8.2
8.2.1
8.2.1.1
8.2.1.2
8.2.1.3
8.2.1.4
8.2.1.5
8.2.1.6
8.2.1.7
8.2.1.8
8.2.1.9
8.2.1.10
8.2.1.11
8.2.1.12
8.2.1.13
8.2.1.14
8.2.1.15
8.2.1.16
8.2.1.17
8.2.1.18
8.2.1.19
8.2.1.20
8.2.1.21
ISP1561_2
Product data sheet
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . 11
PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
OHCI Host Controller . . . . . . . . . . . . . . . . . . . 11
EHCI Host Controller . . . . . . . . . . . . . . . . . . . 11
Dynamic port-routing logic . . . . . . . . . . . . . . . 11
Hi-Speed USB analog transceivers . . . . . . . . 11
LED indicators for downstream ports . . . . . . . 11
Power management . . . . . . . . . . . . . . . . . . . . 12
Legacy support . . . . . . . . . . . . . . . . . . . . . . . . 12
Phase-Locked Loop (PLL) . . . . . . . . . . . . . . . 12
PCI interface . . . . . . . . . . . . . . . . . . . . . . . . . . 12
PCI configuration space . . . . . . . . . . . . . . . . . 12
PCI initiator and target . . . . . . . . . . . . . . . . . . 13
PCI configuration registers . . . . . . . . . . . . . . . 13
PCI configuration header registers . . . . . . . . . 14
Vendor ID register (address: 00h). . . . . . . . . . 14
Device ID register (address: 02h) . . . . . . . . . . 14
Command register (address: 04h) . . . . . . . . . 15
Status register (address: 06h) . . . . . . . . . . . . 16
Revision ID register (address: 08h) . . . . . . . . 18
Class Code register (address: 09h) . . . . . . . . 18
CacheLine Size register (address: 0Ch). . . . . 19
Latency Timer register (address: 0Dh) . . . . . . 19
Header Type register (address: 0Eh) . . . . . . . 19
BIST register (address: 0Fh) . . . . . . . . . . . . . 20
Base Address registers. . . . . . . . . . . . . . . . . . 20
CardBus CIS Pointer register (address: 28h) . 20
Subsystem Vendor ID register (address: 2Ch) 20
Subsystem ID register (address: 2Eh) . . . . . . 21
Expansion ROM Base Address register
(address: 30h). . . . . . . . . . . . . . . . . . . . . . . . . 21
Capabilities Pointer register (address: 34h) . . 21
Interrupt Line register (address: 3Ch). . . . . . . 21
Interrupt Pin register (address: 3Dh) . . . . . . . 22
MIN_GNT and MAX_LAT registers (address:
3Eh and 3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . 22
TRDY Timeout register (R/W: 40h) . . . . . . . . . 22
Retry Timeout register (R/W: 41h) . . . . . . . . . 22
Rev. 02 — 5 March 2007
8.2.2
8.2.2.1
8.2.2.2
8.2.2.3
8.2.3
8.2.3.1
8.2.3.2
8.2.3.3
8.2.3.4
8.2.3.5
8.2.3.6
9
9.1
9.2
9.3
10
10.1
10.2
11
11.1
11.1.1
11.1.2
11.1.3
11.1.4
11.1.5
11.1.6
11.1.7
11.1.8
11.1.9
I
Power management. . . . . . . . . . . . . . . . . . . . . 31
USB Host Controller registers . . . . . . . . . . . . 32
2
C-bus interface . . . . . . . . . . . . . . . . . . . . . . . 30
Enhanced Host Controller-specific PCI
registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SBRN register (address: 60h) . . . . . . . . . . . . 23
FLADJ register (address: 61h) . . . . . . . . . . . . 23
PORTWAKECAP register (address: 62h) . . . 24
Power management registers. . . . . . . . . . . . . 24
CAP_ID register (address: value read from
address 34h + 0h) . . . . . . . . . . . . . . . . . . . . . 24
NEXT_ITEM_PTR register (address: value
read from address 34h + 1h) . . . . . . . . . . . . . 25
PMC register (address: value read from
address 34h + 2h) . . . . . . . . . . . . . . . . . . . . . 25
PMCSR register (address: value read from
address 34h + 4h) . . . . . . . . . . . . . . . . . . . . . 26
PMCSR_BSE register (address: value read
from address 34h + 6h) . . . . . . . . . . . . . . . . . 28
Data register (address: value read from
address 34h + 7h) . . . . . . . . . . . . . . . . . . . . . 29
Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Hardware connections . . . . . . . . . . . . . . . . . . 30
Information loading from EEPROM . . . . . . . . 31
PCI bus power states . . . . . . . . . . . . . . . . . . . 31
USB bus states . . . . . . . . . . . . . . . . . . . . . . . 32
OHCI USB Host Controller operational
registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
HcRevision register (address: content of the
base address register + 00h) . . . . . . . . . . . . . 35
HcControl register (address: content of the
base address register + 04h) . . . . . . . . . . . . . 36
HcCommandStatus register (address: content
of the base address register + 08h) . . . . . . . . 38
HcInterruptStatus register (address: content
of the base address register + 0Ch). . . . . . . . 40
HcInterruptEnable register (address: content
of the base address register + 10h) . . . . . . . . 41
HcInterruptDisable register (address: content
of the base address register + 14h) . . . . . . . . 43
HcHCCA register (address: content of the
base address register + 18h) . . . . . . . . . . . . . 44
HcPeriodCurrentED register (address: content
of the base address register + 1Ch). . . . . . . . 45
HcControlHeadED register (address: content
of the base address register + 20h) . . . . . . . . 46
HS USB PCI Host Controller
© NXP B.V. 2007. All rights reserved.
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