IPR-HPMCII Altera, IPR-HPMCII Datasheet - Page 17

• Manufacturer Part Number: IPR-HPMCII
• Description: IP CORE Renewal Of IP-HPMCII
• Manufacturer: Altera

Specifications of IPR-HPMCII

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GX, HardCopy III, Stratix III, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Design Flow
December 2010 Altera Corporation
You can implement the DDR3 SDRAM Controller with ALTMEMPHY IP using either
one of the following flows:
■
■
You can only instantiate the ALTMEMPHY megafunction using the MegaWizard
Plug-In Manager flow.
Figure 2–1
either one of the flows.
Figure 2–1. Design Flow
SOPC Builder flow
MegaWizard Plug-In Manager flow
shows the stages for creating a system in the Quartus II software using
Functional Simulation
Expected Results?
Simulation Give
Debug Design
Perform
Does
SOPC Builder
Section II. DDR3 SDRAM Controller with ALTMEMPHY IP User Guide
SOPC Builder System
Specify Parameters
Yes
Flow
Complete
Optional
Select Design Flow
and Compile Design
Add Constraints
IP Complete
External Memory Interface Handbook Volume 3
2. Getting Started
Specify Parameters
MegaWizard
Flow