IPR-HPMCII Altera, IPR-HPMCII Datasheet - Page 158

• Manufacturer Part Number: IPR-HPMCII
• Description: IP CORE Renewal Of IP-HPMCII
• Manufacturer: Altera

Specifications of IPR-HPMCII

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GX, HardCopy III, Stratix III, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Figure 9–7. Calibration Timing for HPC
Calibration Timing
memory_0_0.addr[13:0]
memory_0_0.dm_tdqs
seq_pll_start_reconfig
memory_0_0.ba[2:0]
memory_0_0.dq[7:0]
memory_0_0.dqs_n
memory_0_0.cas_n
memory_0_0.ras_n
memory_0_0.we_n
seq_ac_cas_n[1:0]
memory_0_1.ba[0]
memory_0_0.cs_n
memory_0_0.rst_n
seq_pll_select[3:0]
seq_pll_inc_dec_n
seq_ac_ras_n[1:0]
memory_0_0.ck_n
seq_ac_we_n[1:0]
scan_enable_dqs
memory_0_0.cke
memory_0_0.dqs
memory_0_0.odt
scan_enable_dq
memory_0_0.ck
global_reset_n
phs_shft_busy
mem_cas_n
mem_ras_n
mem_we_n
pll_locked
state[1:0]
1
3 333 3333 3
3
[2]
[1]
33 3 3
3
[3]
3
3 3 3 3 3
1
[4]
0
[5]
0
[6]
0
3 3 3 3 3 3 3 3 3 3 3 3 3 3 3
[7]
[8]
7
3
1
3
3
333 1 3
1 0
1
[9]
[12]
3
3
3 3 3
1 0 1
0
3
3
33
1
0
[10]
3
[11]