DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 71

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Table 2.4
Instruction Size *
DIVXS
CMP
NEG
EXTU
EXTS
TAS *
Notes: 1. Size refers to the operand size.
2
2. When using the TAS instruction, use registers ER0, ER1, ER4 and ER5.
B: Byte
W: Word
L: Longword
Arithmetic Operations Instructions (2)
B/W
B/W/L
B/W/L
W/L
W/L
B
1
Function
Performs signed division on data in two general registers: either 16 bits
8 bits
quotient and 16-bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general register
or with immediate data, and sets the CCR bits according to the result.
Takes the two's complement (arithmetic complement) of data in a
general register.
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by padding with zeros on the
left.
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by extending the sign bit.
@ERd – 0, 1
Tests memory contents, and sets the most significant bit (bit 7) to 1.
Rd
0 – Rd
Rd (zero extension)
Rd (sign extension)
Rs
8-bit quotient and 8-bit remainder or 32 bits
Rd
Rd
(<bit 7> of @ERd)
Rd
Rd
Rev. 2.00 Mar 21, 2006 page 31 of 518
REJ09B0299-0200
16 bits
Section 2 CPU
16-bit