DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 64

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 2 CPU
2.4.5
The program counter (PC) among CPU internal registers is initialized when reset exception
handling loads a start address from a vector table. The trace (T) bit in EXR is cleared to 0, and the
interrupt mask (I) bits in CCR and EXR are set to 1. The other CCR bits and the general registers
are not initialized. Note that the stack pointer (ER7) is undefined. The stack pointer should
therefore be initialized by an MOV.L instruction executed immediately after a reset.
2.5
The H8S/2000 CPU can process 1-bit, 4-bit BCD, 8-bit (byte), 16-bit (word), and 32-bit
(longword) data. Bit-manipulation instructions operate on 1-bit data by accessing bit n (n = 0, 1, 2,
…, 7) of byte operand data. The DAA and DAS decimal-adjust instructions treat byte data as two
digits of 4-bit BCD data.
2.5.1
Figure 2.9 shows the data formats of general registers.
Rev. 2.00 Mar 21, 2006 page 24 of 518
REJ09B0299-0200
Initial Register Values
Data Formats
General Register Data Formats
Data Type
1-bit data
1-bit data
4-bit BCD data
4-bit BCD data
Byte data
Byte data
Figure 2.9 General Register Data Formats (1)
Register Number
RnH
RnL
RnH
RnL
RnH
RnL
MSB
Data Image
7
7
7
7
Upper
6 5 4 3 2
Don't care
Don't care
Don't care
4 3
Lower
1 0
LSB
0
0
0
MSB
7
7
7
7
Upper
6 5 4 3 2
Don't care
Don't care
Don't care
4 3
Lower
1 0
LSB
0
0
0