DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 372

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 13 I
8. Notes on start condition issuance for retransmission
Note: This restriction on usage can be canceled by setting the FNC1 and FNC0 bits to 11 in
Rev. 2.00 Mar 21, 2006 page 332 of 518
REJ09B0299-0200
Figure 13.30 Flowchart for Start Condition Issuance Instruction for Retransmission and
Figure 13.30 shows the timing of start condition issuance for retransmission, and the timing for
subsequently writing data to ICDR, together with the corresponding flowchart. Write the
transmit data to ICDR after the start condition for retransmission is issued and then the start
condition is actually generated.
IRIC
SDA
SCL
ICXR.
[1] IRIC determination
2
Write transmit data to ICDR
C Bus Interface (IIC)
Clear IRIC in ICSR
Yes
Yes
SCP = 0 (ICSR)
ACK
Set BBSY = 1,
Read SCL pin
Start condition
SCL = Low?
IRIC = 1?
issuance?
IRIC = 1?
[2] Determination of SCL = Low
9
Yes
Yes
No
No
No
No
[3] (Retransmission) Start condition instruction issuance
Other processing
[1]
[2]
[3]
[4]
[5]
Timing
Start condition generation
(retransmission)
[4] IRIC determination
[1] Wait for end of 1-byte transfer
[2] Determine whether SCL is low
[3] Issue start condition instruction for retransmission
[4] Determine whether start condition is generated or not
[5] Set transmit data (slave address + R/W)
Note:* Program so that processing from [3] to [5]
[5] ICDR write (transmit data)
is executed continuously.
bit7