DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 385

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

14.4
14.4.1
In a receive operation, both KCLK (clock) and KD (data) are outputs on the keyboard side and
inputs on this LSI chip (system) side. KD receives a start bit, 8 data bits (LSB-first), an odd parity
bit, and a stop bit, in that order. The KD value is valid when KCLK is low. A sample receive
processing flowchart is shown in figure 14.3, and the receive timing in figure 14.4.
Operation
Receive Operation
Receive data processing
(receive enabled state)
Receive enabled state
and KDI bits both
Clear KBF flag
Set KBIOE bit
Read KBCRH
Read KBBR
Set KBE bit
KBF = 1?
PER = 0?
KBS = 1?
KCLKI
Start
1?
Figure 14.3 Sample Receive Processing Flowchart
Yes
Yes
Yes
Yes
[1]
[2]
No
[3]
No
No
No
[6]
Keyboard side in data
Execute receive abort
Error handling
transmission state.
[4]
processing.
[5]
Rev. 2.00 Mar 21, 2006 page 345 of 518
Section 14 Keyboard Buffer Controller
[1] Set the KBIOE bit to 1 in
[2] Read KBCRH, and if the
[3] Detect the start bit output
[4] When a stop bit is received,
[5] Perform receive data
[6] Clear the KBF flag to 0 in
The receive operation can be
continued by repeating steps
[3] to [6].
KBCRH.
KCLKI and KDI bits are
both 1, set the KBE bit
(receive enabled state).
on the keyboard side and
receive data in
synchronization with the fall
of KCLK.
the keyboard buffer
controller drives KCLK low
to disable keyboard
transmission (automatic I/O
inhibit).
If the KBIE bit is set to 1 in
KBCRH, an interrupt
request is sent to the CPU
at the same time.
processing.
KBCRL. At the same time,
the system automatically
drives KCLK high, setting
the receive enabled state.
REJ09B0299-0200