DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 29

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 1 Overview
Figure 1.1
Figure 1.2
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.9
Figure 2.10
Figure 2.11
Figure 2.12
Figure 2.13
Section 3 MCU Operating Modes
Figure 3.1
Figure 3.2
Section 4 Exception Handling
Figure 4.1
Figure 4.2
Figure 4.3
Section 5 Interrupt Controller
Figure 5.1
Figure 5.2
Figure 5.3
Figure 5.4
Figure 5.5
Internal Block Diagram of H8S/2110B ..............................................................
Pin Arrangement of H8S/2110B.........................................................................
Exception Vector Table (Normal Mode) ............................................................ 17
Stack Structure in Normal Mode ........................................................................ 17
Exception Vector Table (Advanced Mode) ........................................................ 18
Stack Structure in Advanced Mode .................................................................... 19
Memory Map ...................................................................................................... 19
CPU Internal Registers ....................................................................................... 20
Usage of General Registers................................................................................. 21
Stack ................................................................................................................... 22
General Register Data Formats (1) ..................................................................... 24
General Register Data Formats (2) ..................................................................... 25
Memory Data Formats........................................................................................ 26
Instruction Formats (Examples).......................................................................... 38
Branch Address Specification in Memory Indirect Addressing Mode ............... 41
State Transitions ................................................................................................. 45
Address Map for H8S/2110B (1)........................................................................ 55
Address Map for H8S/2110B (2)........................................................................ 56
Reset Sequence (Mode 3) ................................................................................... 59
Stack Status after Exception Handling ............................................................... 61
Operation When SP Value Is Odd ...................................................................... 62
Block Diagram of Interrupt Controller ............................................................... 64
Relationship between Interrupts IRQ7 and IRQ6, Interrupts KIN15 to KIN0,
Interrupts WUE7 to WUE0, and Registers KMIMR, KMIMRA, and WUEMRB 72
Block Diagram of Interrupts IRQ7 to IRQ0 ....................................................... 73
Flowchart of Procedure Up to Interrupt Acceptance in Interrupt Control Mode 0 78
State Transition in Interrupt Control Mode 1 ..................................................... 79
Figures
Rev. 2.00 Mar 21, 2006 page xxvii of xxxviii
2
3