DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 229

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Notes: 1. Only 0 can be written, for flag clearing.
10.3.6
TCORC is an 8-bit readable/writable register. The sum of contents of TCORC and TICR is always
compared with TCNT. When a match is detected, a compare-match C signal is generated.
However, comparison at the T2 state in the write cycle to TCORC and at the input capture cycle of
TICR is disabled. TCORC is initialized to H'FF.
10.3.7
TICRR and TICRF are 8-bit read-only registers. While the ICST bit in TCONRI is set to 1, the
contents of TCNT are transferred at the rising edge and falling edge of the external reset input
(TMRIX) in that order. The ICST bit is cleared to 0 when one capture operation ends. TICRR and
TICRF are initialized to H'00.
10.3.8
TISR permits or prohibits a signal source of external clock/reset input for the counter.
Bit
1
0
Bit
7
to
1
0
Bit Name Initial Value R/W
OS1
OS0
2. The program development tool (emulator) does not support this pin.
Bit Name Initial Value R/W
—
IS
Time Constant Register (TCORC)
Input Capture Registers R and F (TICRR and TICRF)
Timer Input Select Register (TISR)
0
0
All 1
0
R/W
R/W
R/(W) Reserved
R/W
Output Select 1, 0
These bits specify how the TMOY pin *
be changed by compare-match A of TCORA_Y and
TCNT_Y.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Description
Description
The initial value should not be changed.
Input Select
Selects a timer clock/reset input pin (TMIY) as the signal
source of external clock/reset input for the TMR_Y
counter.
0: Input is prohibited
1: TMIY (TMCIY/TMRIY) is permitted for input
Rev. 2.00 Mar 21, 2006 page 189 of 518
Section 10 8-Bit Timer (TMR)
REJ09B0299-0200
2
output level is to